In the field of semiconductor devices, in which miniaturization has been advancing, various materials having a porous structure and a low dielectric constant (hereinafter, also referred to as “low-k materials”) have been studied as a material for an interlayer dielectric layer for a semiconductor.
In a porous interlayer dielectric layer for a semiconductor such as this, there has been a problem in that when the porosity is increased to further lower the dielectric constant, it becomes easier for a metal component, such as copper that is embedded as an interconnection material, to intrude into pores of the interlayer dielectric layer for a semiconductor, thereby increasing the dielectric constant or causing leak currents.
In contrast, Japanese National Phase Publication No. 2009-503879 discloses a technique of sealing pores formed on side wall surfaces of grooves formed by etching, by using a micellar surfactant for wet washing after the etching, in a process for producing a semiconductor device in which a porous low dielectric constant material is used.
Further, for example, International Publication (WO) No. 09/012184 discloses a technique of controlling the hydrophilicity/hydrophobicity of a low-k material having a hydrophobic surface by applying a polyvinyl alcohol-based amphiphilic polymer to the surface of the material.
Further, for example, Japanese Patent Application Laid-Open (JP-A) No. 2006-352042 discloses a composition for polishing a semiconductor, the composition containing a cationic polymer and a surfactant.